1. Field of the Invention
The present invention relates to a mask and a method of fabricating semiconductor device using the same, and more specifically to a mask with extended mask clear-out window and a method of dummy exposure using the same.
2. Description of the Prior Art
In shallow trench isolation (STI) process, insulating layers such as oxide or nitride layers are normally used as mask layer or etching-stop layer, which is usually etched away or entirely removed in subsequent process.
Because of the loading effect, oxide layer sometimes cannot be thoroughly removed, and residuals mostly stay in areas like the wide areas near alignment mark or areas near the wafer edge. The residuals will behave as undesired mask in following etching or photolithographic steps to cause defects.
Over-polishing is often performed to reduce residuals, but it creates other problems for the semiconductor device, such as dishing. It is necessary to add steps to protect the surface of a semiconductor device from the foregoing problems.